Memory discrete shift register for multiplexed signal block
- Size of inputs
Integer. The size of the input port
Type 'vec' of size 1.
- Number of shift
Integer. The number of right shift
Type 'vec' of size 1.
- Inherit (no:0, yes:1)
Herits events by its regular input ports (disable the event input port).
Type 'vec' of size 1.
- always active: no
- direct-feedthrough: yes
- zero-crossing: no
- mode: no
- number/sizes of inputs: 1 / 256
- number/sizes of outputs: 1 / 256
- number/sizes of activation inputs: 0 /
- number/sizes of activation outputs: 0 /
- continuous-time state: no
- discrete-time state: yes
- name of computational function: overlaprsr
- MODNUM/macros/scicos_blocks/Tools/OVERLAPRSR_f.sci [view code]
- MODNUM/routines/scicos/tools/overlaprsr.c (Type 4) [view code]
IRCOM Group Alan Layec