Fonction d'interfaçage
fr

CNA_f

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//CNA_f Digital to Analog Converter block
//Classical interface function ver1.0 - scilab-2.7
//10 octobre 2003 - IRCOM GROUP - Author : A.Layec
function [x,y,typ]=CNA_f(job,arg1,arg2)
x=[];y=[];typ=[]
select job
case 'plot' then
  standard_draw(arg1)
case 'getinputs' then
  [x,y,typ]=standard_inputs(arg1)
case 'getoutputs' then
  [x,y,typ]=standard_outputs(arg1)
case 'getorigin' then
  [x,y]=standard_origin(arg1)
case 'set' then
   x=arg1;
   graphics=arg1.graphics;model=arg1.model;
   exprs=graphics.exprs;

  while %t do

   [ok,q,vmin,nbit,cc2,exprs]=getvalue('Digital to Analog Converter block',...
   ['q';'vmin';'number of bit';'CC2 (0/1)'],...
   list('vec',-1,'vec',-1,'vec',-1,'vec',-1),exprs);

   if ~ok then break,end;

   if (size(vmin)==size(q)) then
       Nu = prod(size(q));
       [model,graphics,ok]=check_io(model,graphics,Nu,Nu,1,[]);
       if ok then
           graphics.exprs=exprs;
           model.rpar=[q;vmin];
           model.ipar=[nbit;cc2];
           x.graphics=graphics; x.model=model;
           break;
        end
   else
       message('Vector q and Vector vmin state must have the same size');
   end
  end

case 'define' then
  Nu=1;
  nbit=8;
  q=0.1;
  vmin=0;
  cc2=0;

  model=scicos_model()
  model.sim=list('cna',1)
  model.in=Nu
  model.out=Nu
  model.evtin=1
  model.evtout=[]
  model.dstate=[]
  model.rpar=[q;vmin]
  model.ipar=[nbit;cc2]
  model.blocktype='d'
  model.firing=[]
  model.dep_ut=[%f %f]

//  model=list(list('cna',1),Nu,Nu,1,[],[],[],[q vmin],[nbit cc2],'c',[],[%f %f],' ',list())
  gr_i=['txt=[''CNA''];';
    'xstringb(orig(1),orig(2),txt,sz(1),sz(2),''fill'');']
  label=[sci2exp(q),sci2exp(vmin),sci2exp(nbit),sci2exp(cc2)];
  x=standard_define([2 2],model,label,gr_i)
end
endfunction